­­­­­­­­­­­­Intel to Customize Chips for Big Data

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Chip FabAgam Shah over at Computerworld reports that Intel is now tuning chips for Big Data workloads. Intel is trying to determine how chips can perform better in predictive analytics, cloud data collection and specific task processing.

The company is also increasing its efforts in software, and has also released its own distribution of Hadoop, which is intended to become the starting for Intel’s efforts in big data analytics. Ron Kasabian, general manager of big data solutions said: “Software is becoming an important building block in chip design, and customization will help applications gather, manage and analyze data a lot quicker.”

Renee James, formerly head of the software unit at Intel, was named president earlier this year, and this signals the company’s deeper commitment to software.  Intel has long backed open-source and has hundreds of developers contributing to Linux. The effort in software is expected to lead to chip improvements for big data.

It takes a while to get silicon to market. We understand where we can optimize for silicon, and there are certain things to improve for performance and optimization,” said Kassabian, adding that the chip design process takes about two years.

According to Kassabian, different implementations would be required, depending on the industry in question and cited genomics and telecommunications as examples. Intel is also working on the “internet of things” in which networked sensors are used for data gathering. The company intends to leverage some of its software assets here including McAfee and the Wind River real time operating system.

The chip-tuning plan includes developing accelerators for big-data workloads. In one of the first projects Intel is working with Chinese company Bocom to implement the Smart City project, to solve the problem of counterfeit license plates in China. The project requires sending images through server gateways, and Intel is looking to fill software gaps by enhancing the silicon, such as implementing accelerators to decode video.

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